Description: Please refer to the section BELOW (and NOT ABOVE) this line for the product details - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Title:Low-Power High-Level Synthesis For Nanoscale Cmos CircuitsISBN13:9780387764733ISBN10:0387764739Author:Mohanty, Saraju P. (Author), Ranganathan, Nagarajan (Author), Kougianos, Elias (Author)Description:Low-Power High-Level Synthesis For Nanoscale Cmos Circuits Addresses The Need For Analysis, Characterization, Estimation, And Optimization Of The Various Forms Of Power Dissipation In The Presence Of Process Variations Of Nano-Cmos Technologies The Authors Show Very Large-Scale Integration (Vlsi) Researchers And Engineers How To Minimize The Different Types Of Power Consumption Of Digital Circuits The Material Deals Primarily With High-Level (Architectural Or Behavioral) Energy Dissipation Because The Behavioral Level Is Not As Highly Abstracted As The System Level Nor Is It As Complex As The Gatetransistor Level At The Behavioral Level There Is A Balanced Degree Of Freedom To Explore Power Reduction Mechanisms, The Power Reduction Opportunities Are Greater, And It Can Cost-Effectively Help In Investigating Lower Power Design Alternatives Prior To Actual Circuit Layout Or Silicon Implementation The Book Is A Self-Contained Low-Power, High-Level Synthesis Text For Nanoscale Vlsi Design Engineers And Researchers Each Chapter Has Simple Relevant Examples For A Better Grasp Of The Principles Presented Several Algorithms Are Given To Provide A Better Understanding Of The Underlying Concepts The Initial Chapters Deal With The Basics Of High-Level Synthesis, Power Dissipation Mechanisms, And Power Estimation In Subsequent Parts Of The Text, A Detailed Discussion Of Methodologies For The Reduction Of Different Types Of Power Is Presented Including: - Power Reduction Fundamentals - Energy Or Average Power Reduction - Peak Power Reduction - Transient Power Reduction - Leakage Power Reduction Low-Power High-Level Synthesis For Nanoscale Cmos Circuits Provides A Valuable Resource For The Design Of Low-Power Cmos Circuits Binding:Hardcover, HardcoverPublisher:SpringerPublication Date:2008-07-07Weight:1.3 lbsDimensions:0.8'' H x 9.3'' L x 6.3'' WNumber of Pages:302Language:English
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Book Title: Low-Power High-Level Synthesis For Nanoscale Cmos Circuits
Item Length: 9.3in
Item Width: 6.1in
Author: Priyardarsan Patra, Elias Kougianos, Saraju P. Mohanty, Nagarajan Ranganathan
Publication Name: Low-Power High-Level Synthesis for Nanoscale Cmos Circuits
Format: Hardcover
Language: English
Publisher: Springer
Publication Year: 2008
Type: Textbook
Item Weight: 23.6 Oz
Number of Pages: Xxxii, 302 Pages
